In the earlier, the main concerns of very large scale integration (VLSI) designer were cost, area, reliability and performance; power consideration was generally secondary importance. In the earlier few eras ago, the electronics productiveness has been experiencing an exceptional issue in growth, thanks to the use of integrated circuits (IC) in computing, telecommunications and user electronics. We have come a long way from the single transistor years in 1958 to the current day Ultra Large Scale Integration (ULSI) systems with more than 60 million transistors in a single chip.
Power dissipation of VLSI integrated circuits is traditionally a neglected subject. In earlier, the device packing density and operating frequency were low enough that it was not a constraint in the integrated circuits. This leads the steady growth of the operating frequency and processing capacity per ICs, resulting in increasing power dissipation. A need of low power VLSI design arises from such evaluation forces of ICs.
Another chief demand for low power integrated circuits and systems
comes from the environmental concerns. Modern offices are now furnished with
office automation equipment that consume large amount of power. A study by American Council for an Energy-Efficient
Economy estimated that office equipment account for 5% for the total US
commercial energy usage in 1997 and could rise to 10% by the year 2004 if no
actions are taken to prevent the trend
1. A. P. Chandrakasn, S. Sheng, and R. W. Broad, “Low Power CMOS Digital Design,” IEEE Journal of Solid-state Circuits, Vol. 27, No. 04, pp. 473-484, April 1999.
2.J. M. RABAEY, AND M. PEDRAM, “Low Power Design Methodologies,” Kluwer Academic Publishers, 2002.